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PI6C2410 21098765432121098765432109876543210987654321210987654321098765432109876543212109876543210987654321098765432121098765432109876543210987654321 21098765432121098765432109876543210987654321210987654321098765432109876543212109876543210987654321098765432121098765432109876543210987654321 PCI-X Clock Buffers Product Features * * * * * * * * * * Four synchronous outputs Selectable divider/multiplier Output Enable control Low phase error < 150 ps Allows clock input to have spread spectrum modulation for EMI reduction Low output skew < 200 ps Low cycle jitter < 200 ps Industrial temperature (-40C to 85C) 3.3V supply Packages (Pb-free and Green available): 24-pin QSOP (Q) 24-pin TSSOP (L) Product Description PI6C2410 is a low skew, low jitter, PLL clock buffer with divider or multiplier designed for PCI-X application in servers and workstations. There are two selectable input ranges using HF# input: 10-40 MHz and 40-80 MHz. All outputs are synchronized to the input and to the other outputs. Each output can be independently turned off to reduce EMI and power consumption. Pin Configuration AGND VCC HF# 1 2 3 4 5 6 7 8 9 10 11 12 24 23 22 21 CLKIN AVCC VCC OUT0 OUT1 GND GND OUT2 OUT3 VCC OE3 OE2 Block Diagram DIV0 DIV1 GND 24-Pin Q, L 19 18 17 16 15 14 13 20 OUT0 OUT1 OUT2 OUT3 PLL FBOUT GND FBIN FBOUT VCC OE0 OE1 OE[0:3] HF# CLKIN FBIN DIV[0:1] DIV Clock Select Table HF# 1 1 1 1 0 0 0 0 DIV1 1 1 0 0 1 1 0 0 DIV0 1 0 1 0 1 0 1 0 OUTx CLKIN 2xCLKIN 33MHz 3xCLKIN 4xCLKIN CLKIN/2 CLKIN 66MHz 1.5xCLKIN 2xCLKIN 100MHz 133MHz 100MHz 133MHz 33MHz 66MHz CLKIN OUTx 33MHz 66MHz 1 PS8593B 01/12/05 21098765432121098765432109876543210987654321210987654321098765432109876543212109876543210987654321098765432121098765432109876543210987654321 21098765432121098765432109876543210987654321210987654321098765432109876543212109876543210987654321098765432121098765432109876543210987654321 PI6C2410 PCI-X Clock Buffers Pin Description Pin 21,20,17,16 11, 12, 13, 14 9 8 24 3 4,5 2,10,15,22 6,7,18,19 23 1 Type O I O I I I I P P P P Qty 4 4 1 1 1 1 2 4 4 1 1 Symbol OUT[0:3] OE[0:3] FBOUT FBIN CLKIN HF# DIV[0,1] VC C GND AVC C AGND De s cription Clock outputs. To achieve zero input to output delay, all outputs must have the same loading. Active high Output Enable, pulled up. When OE is low, OUT [0:3] outputs are disabled at low state. Feedback output. To achieve zero input to output delay, FBOUT must have the same loading as OUT[0:3]. Feedback input. Input Clock. High Frequency range, pulled up. "1" = Low, "0" = High. Divider/Multiplier Select, pulled up. 3.3V power Ground 3.3V analog power Analog ground Absolute Maximum Ratings Supply Voltage (VCC, AVCC) ................................................ 0.5V to +4.6V Input Voltage ................................................................ -0.5V to Vcc+0.5V Industrial Operating Temperature ....................................... -40C to +85C Storage Temperature ........................................................ -65C to +150C Junction Temperature ....................................................................... 150C Input ESD MIL-883, Method 3015, human body model ....................... 2kV Operating Condition Symbol VCC, AVCC TA De s cription I/O Supply, Analog Core Supply Industrial Ambient Temperature M in. 3.0 -40 M ax. 3.6 +85 Units V C 2 PS8593B 01/12/05 21098765432121098765432109876543210987654321210987654321098765432109876543212109876543210987654321098765432121098765432109876543210987654321 21098765432121098765432109876543210987654321210987654321098765432109876543212109876543210987654321098765432121098765432109876543210987654321 PI6C2410 PCI-X Clock Buffers DC Electrical Characteristics Over Operating Conditions Symbol VIL VIH IIL IIH VOL VOH Idd_33 Idd_66 Idd_100 Idd_133 CO CI LPIN Parame te r Low Input Voltage High Input Voltage Low Input Current High Input Current Low Output Voltage High Output Voltage Supply Current Supply Current Supply Current Supply Current Output Capacitance Input Capacitance Pin Inductance VIN = 0V VIN = VCC VCC = 3.0V, Iol = 12mA VCC = 3.0V, Ioh = -12mA CL = 15pF, FOUT = 33MHz CL = 15pF, FOUT = 66MHz CL = 15pF, FOUT = 100MHz CL = 15pF, FOUT = 133MHz 2.4 25 35 tbd 45 60 6 pF 6 7 nH mA 2.0 50 uA 200 0.4 V Conditions M in. Typ. M ax. 0.8 V Units Switching Characteristics (TA = 25C, VCC = 3.3V 0.3V, Cl = 15pF, FOUT = 66.67 MHz) Symbol FIN FOUT TPD TSK TSKPP TJC TDC TR/TF Parame te r Input frequency High Freq., HF# = "0" Output frequency Propagation delay Output skew Pkg to pkg skew Cycle jitter Duty cycle Rise/Fall time @1.4V 0.8V~2.0V 35 50 CLKIN to FBIN rising edges @VDD/2 @1.4V, rising edges @VDD/2, rising edges, same CLKIN -150 40 66 80 160 150 200 400 200 65 1. 5 % ns ps MHz Te s t Conditions Low Freq., HF# = "1" M in. 10 Typ. 33 M ax. 40 Units Note: Tjc = Tp(n+1) -Tp(n) Tdc = Th/Tp Tp(n) = Period of the nth cycle Tp = Period cycle time Tp(n+1) = Period of nth+1 cycle Th = High time @1.4V 3 PS8593B 01/12/05 21098765432121098765432109876543210987654321210987654321098765432109876543212109876543210987654321098765432121098765432109876543210987654321 21098765432121098765432109876543210987654321210987654321098765432109876543212109876543210987654321098765432121098765432109876543210987654321 PI6C2410 PCI-X Clock Buffers 2.0V 0.8V Tr Tf 2.0V 0.8V T1 1.4V Tp Figure 2. Duty cycle Figure 1. Rise/Fall time OUTx 1.4V Tsk 1.4V 1.65V Tp(n) 1.65V Tp(n+1) OUTy Figure 3. Output skew Figure 4. Cycle jitter Device1 OUTx Device2 OUTy 1.65V Tskp2p 1.65V CLKIN 1.65V Tpd 1.65V FBIN Figure 5. Pkg.-to-Pkg. skew Figure 6. Propagation Delay DUT OUTx 15pF Figure 7. Test load 4 PS8593B 01/12/05 21098765432121098765432109876543210987654321210987654321098765432109876543212109876543210987654321098765432121098765432109876543210987654321 21098765432121098765432109876543210987654321210987654321098765432109876543212109876543210987654321098765432121098765432109876543210987654321 PI6C2410 PCI-X Clock Buffers Packaging Mechanical: 24-pin QSOP (Q) 24 .008 0.20 MIN. .008 .013 0.20 0.33 Guage Plane .150 .157 3.81 3.99 .010 0.254 1 .337 .344 8.56 8.74 Detail A .016 .035 0.41 0.89 .041 1.04 REF 0-6 .033 0.84 .053 .069 1.35 1.75 .015 x 45 0.38 Detail A .007 .010 SEATING PLANE .004 0.101 .010 0.254 .016 .050 0.406 1.27 .228 .244 5.79 6.20 0.178 0.254 .025 typical 0.635 .008 0.203 .012 0.305 X.XX DENOTES DIMENSIONS X.XX IN MILLIMETERS Packaging Mechanical: 24-Pin TSSOP (L) 24 .169 .177 4.3 4.5 .004 .008 0.09 0.20 1 .303 .311 7.7 7.9 0.45 0.75 .047 1.20 Max .018 .030 SEATING PLANE .252 BSC 6.4 .0256 BSC 0.65 .007 .012 0.19 0.30 .002 .006 0.05 0.15 5 PS8593B 01/12/05 21098765432121098765432109876543210987654321210987654321098765432109876543212109876543210987654321098765432121098765432109876543210987654321 21098765432121098765432109876543210987654321210987654321098765432109876543212109876543210987654321098765432121098765432109876543210987654321 PI6C2410 PCI-X Clock Buffers Ordering Information Orde ring Code PI6C2410Q PI6C2410QE PI6C2410L PI6C2410LE Package Name Q Q L L Package Type 24- pin, 150- mil QSOP Pb- free & Green, 24- pin, 150- mil QSOP 24- pin, 173- mil TSSOP Pb- free & Green, 24- pin, 173- mil TSSOP Notes: 1. Thermal characteristics can be found on the company web site at http://www.pericom.com/packaging/ Pericom Semiconductor Corporation * 1-800-435-2336 * http://www.pericom.com 6 PS8593B 01/12/05 |
Price & Availability of PI6C2410QE |
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